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    PCB Assembly PFMEA

    PFMEA PCB Assembly (SMT) Example

    4 min read Last updated
    A realistic Process FMEA for a surface-mount PCB assembly line. The example covers paste printing through functional test and conformal coating, with the specific failure mechanisms IPC and customer auditors look for. Use it alongside the AIAG-VDA 7-step process and the Action Priority guide.

    Process overview

    The scope is a double-sided SMT assembly with mixed-technology components (BGAs, QFNs, fine-pitch ICs, 0402 passives, two through-hole connectors hand-soldered downstream). The line is paste print → SPI → placement → pre-reflow AOI → reflow → post-reflow AOI → ICT → conformal coating → final inspection. Bare board specification, schematic and BOM are frozen — those belong to the DFMEA. This PFMEA covers everything that happens after the board enters the SMT line.

    Process flow

    1. Bare PCB receiving and MSL-controlled storage
    2. Solder paste printing (Type 4 SAC305, stencil 100 µm)
    3. Solder paste inspection (SPI) — 100 % volume / area
    4. Component placement (chip shooter + fine-pitch placer)
    5. Pre-reflow AOI
    6. Reflow soldering (10-zone convection oven, nitrogen)
    7. Post-reflow AOI + X-ray sampling on BGAs
    8. In-circuit test (ICT) and functional test
    9. Selective conformal coating
    10. Final inspection and packaging

    Common failure modes

    • Open joints and insufficient solder — almost always traceable to paste deposit (SPI) rather than reflow.
    • Solder bridges — fine-pitch placement combined with excess paste or pad design.
    • Tombstoning — chip resistors and capacitors lifted on one end, driven by paste asymmetry and uneven heating ramp.
    • BGA cold joints and voids — the hardest failures to detect; X-ray sampling is the only realistic check.
    • Wrong component / wrong orientation — feeder loading errors, reel orientation, MSL handling.
    • Conformal coating defects — capillary creep, pinholes, coating under tall parts trapping flux.
    • ICT escapes — false pass driven by probe wear; the single highest-impact escape mode on most lines.

    Representative PFMEA table

    Ten representative rows. Use the ranking tables for calibrated S/O/D scales.

    Process StepFailure ModeEffectCausePreventionDetectionSODAP
    Bare PCB receiving / storageMoisture-damaged PCB used at reflowDelamination, measling, blistering during reflowMSL Level 3 storage violated; bag opened > floor lifeMSL dry cabinet + opened-bag logDewpoint log + mandatory bake before use734Medium
    Solder paste printingInsufficient solder volumeOpen joints; latent intermittent field failureStencil aperture clogging; squeegee pressure driftUnder-stencil wipe every N prints100% SPI (solder paste inspection) volume check743Medium
    Solder paste printingExcess paste / bridging riskShort circuit after reflowPrint parameters drift; stencil under-tensionPrint parameter SPC + stencil tension logSPI bridge detection algorithm832Medium
    Component placementWrong component placedFunctional failure of assemblyFeeder mis-loaded; reel swap not verifiedFeeder verification scan vs BOM at every changeoverPre-reflow AOI footprint match833High
    Component placementPolarized part placed reversed (electrolytic cap, diode, IC)Burnout on first power-upReel orientation incorrect on feederFirst-piece polarity verification + reel orientation Poka-yokeAOI orientation check + ICT922Medium
    Reflow solderingCold joint on BGA / QFNIntermittent field failure under thermal cyclingReflow profile peak below alloy liquidus + insufficient time-above-liquidusDaily profile verification with KIC oven probeX-ray sampling on BGAs935High
    Reflow solderingTombstoning on 0402 / 0201 chipsOpen circuitPad imbalance + asymmetric paste deposit + uneven heatingPad design rule audit + paste alignment SPCPost-reflow AOI743Medium
    Post-reflow inspectionBGA void area > 25 %Long-term reliability degradation under thermal cyclingStencil thickness wrong for BGA pitch; paste outgassingStencil design review on new BGA introductionX-ray sampling per IPC-A-610834High
    ICT / functional testFalse pass due to test fixture probe wearDefective board shipped to customerProbe contact wear and oxidation undetectedProbe replacement schedule by cycle countQuarterly correlation study with golden boards (Gauge R&R)924High
    Conformal coatingCoating capillary under tall componentsTrapped flux / accelerated corrosion in fieldSpray angle misaligned; viscosity driftSetup validation per work instruction; viscosity check per batchUV inspection of coverage on 100 % first lot645Medium

    Example failure chains

    TriggerFailure chainCustomer impact
    Stencil aperture partially clogged on a fine-pitch QFNLow paste volume on 4 pads → open joints survive AOI (joint visible) → fail at ICT or worse, intermittent field failureField returns 2–6 months later, RMA cost + reputation
    Reflow oven Zone 7 element ages — 8 °C cooler than profileTime-above-liquidus drops below 45 s on BGAs → cold joints not visible to AOI → escape until thermal cycling in fieldLatent reliability failure, hardest type to root-cause
    ICT probe wear on test point 47Intermittent contact → board passes test on retest → defective board shipped → customer functional failure on first power-upCustomer line stop; ICT correlation study triggered

    Current controls

    SMT lines run with dense automated inspection, but every inspection has a known false-pass rate. The PFMEA must reflect that, not assume 100 % capture.

    • Prevention: MSL dry storage, feeder verification, stencil cleaning schedule, reflow profile validation, ICT probe PM, BGA stencil design review.
    • Detection: 100 % SPI volume measurement, pre- and post-reflow AOI, X-ray sampling on BGAs (typically 1 per shift per type), ICT, functional test, UV inspection on conformal coat.

    Action Priority discussion

    The High-AP rows are dominated by latent-defect failure modes: BGA cold joints, BGA voiding, ICT escapes. These share a structural problem — Detection is fundamentally limited because the failure is not visible to optical inspection. The realistic Detection floor is 4 or higher even with X-ray sampling. The AP guide rules promote any High Severity (≥ 7) with Medium Occurrence and weak Detection straight to AP High, which is the correct engineering conclusion for these failures.

    Common mistakes in PCB assembly PFMEAs

    • Treating AOI as Detection 2. Modern AOI is genuinely Detection 3–4 on joint quality; it is not a guarantee against cold joints.
    • Forgetting MSL handling. Moisture absorption on bare boards and on moisture-sensitive ICs is a common audit finding.
    • Single row for "soldering" instead of separating paste, placement and reflow. Each has different causes and different controls.
    • Ignoring probe wear in ICT. False-pass is the dominant escape mode on mature lines.
    • Conformal coating treated as a downstream finishing step rather than a process step with its own failure modes.

    Audit considerations

    IPC and customer EMS auditors look for: paste deposit SPC linked to SPI data, reflow profile control (KIC or equivalent profiling on a defined cadence), ICT correlation study evidence, and BGA X-ray sampling plan with a defensible sample size. The PFMEA must reference these by control name, not generically. Misalignment between the PFMEA, the SMT process Control Plan and the work instructions is a common observation. Use the FMEA audit checklist as a pre-submission review.

    PFMEA — PCB Assembly in the Qhubio knowledge graph

    How PFMEA — PCB Assembly connects to other FMEA concepts, standards, examples and software.

    Frequently asked questions

    Learning path

    Three tiers, automatically derived from the Qhubio knowledge graph. The tier containing this guide is highlighted.

    Further reading

    Curated next steps — methodology guides, worked examples, and the relevant tool.

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